Home Call for Papers Abstract Submission Conference Information Technical Program    Plenary Session    Invited Presentations    Rump Sessions    Social Events    Short Course    Advance Program    EMC Presenter Information Committee Technical Program—Advance Program Monday | Tuesday | Wednesday Wednesday AM, June 24, 2009 Location: Presidents 3/4 Joint DRC/EMC Plenary Session 8:20 AM EMC Welcome EMC Introductory Remarks EMC Awards 9:20- 10:00 AM Break Wednesday AM, June 24, 2009 Location: Main Level Dean's Hall I Session VI.A Memory Devices Session Organizer: TBA Session Chair(s): Tahir Ghani, Intel and An Chen, GLOBALFOUNDRIES 10:00 AM VI.A.-1 Invited Paper FEDRAM: A DRAM Cell Based on Ferroelectric-Gated Field-Effect Transistor T. P. Ma, Department of Electrical Engineering, Yale University, New Haven, Connecticut, USA 10:40 AM VI.A.-2 Student Paper “Nothing” Can Be Better: Study of Porosity in the Charge Trap Layer of Flash Memory S. Rajwade1, H. Arora2, J. Shaw1, U. Wiesner2 and E. C. Kan1, 1School of Electrical and Computer Engineering and 2Department of Materials Science and Engineering, Cornell University, Ithaca, New York, USA 11:00 AM VI.A.-3 Resistive Switching Devices: Switching Power and Operation Control A. Chen, Strategic Technology Group, GLOBALFOUNDRIES, Sunnyvale, California, USA 11:20 AM VI.A.-4 Student Paper Chalcogenide Phase Change Induced with Single-Wall Carbon Nanotube Heaters A. Liao1, F. Xiong1, K. Darmawikarta2, J. Abelson2, and Eric Pop1, 1Dept. of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, 2Dept. of Material Science and Engineering, University of Illinois, Urbana-Champaign, and Micro and Nanotechnology Lab, Urbana, Illinois, USA 11:40 AM VI.A.-5 Late News Wednesday AM, June 24, 2009 Location: Main Level Dean's Hall II Session VI.B More than Moore / Late News Session Organizer: TBA Session Chair(s): San-Hyun Oh, University of Minnesota and Mikael Östling, KTH 10:00 AM VI.B-1 Invited Paper Interfacing devices with cells J. Voldman, Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA 10:40 AM VI.B-2 Late News 11:00 AM VI.B-3 Late News 11:20 AM VI.B-4 Late News 11:40 AM VI.B-5 Late News Wednesday PM, June 24, 2009 Location: Main Level Dean’s Hall I Session VII.A MOS Devices Session Organizer: TBA Session Chair(s): Suman Datta, Penn State University and P. M. Solomon, IBM TBA 1:30 PM VII.A-1 Invited Paper Device Scaling for 15 nm Node and Beyond G. G. Shahidi, IBM T. J. Watson Research Center, Yorktown Heights, New York, USA 2:10 PM VII.A-2 Deep Sub-micron and Self- Aligned Flatband III-V MOSFETs R. J. W. Hill1, X. Li1, H. Zhou1, D. S. Macintyre1, S. Thoms1, M. C. Holland1, P. Longo1, D. A. J. Moran1, A. J. Craven1, C. R. Stanley1, A. Asenov1, R. Droopad2, M. Passlack1, and I. G. Thayne1, 1Nanoelectronics Research Centre, University of Glasgow, Glasgow, Scotland and 2Texas State University, San Marcos, Texas, USA 2:30 PM VII.A-3 Student Paper 0.37 mS/µm In0.53Ga0.47As MOSFET with 5 nm channel and Self-aligned Epitaxial Raised Source/Drain U. Singisetti1, M. A. Wistey1,2, G. J. Burek1, A. K. Baraskar1, J. l. Cagnon2 , B. J. Thibeault1, S. Stemmer2, A. C. Gossard1,2 M. J. W. Rodwell1, E. Kim3, B. Shin3, P. C. McIntyre3, and Y-J. Lee4, 1ECE Department, University of California, Santa Barbara, California, USA, 2Materials Department, University of California, Santa Barbara, California, USA, 3Materials Science and Engineering Department, Stanford University, Stanford, California, USA, and 4Intel Corporation, Santa Clara, California, USA 2:50 PM VII.A-4 Student Paper New Universal Physical Model for the Recoverable Part of NBTI Degradation X. Zhang, M. Deal, and Y. Nishi, Department of Electrical Engineering, Stanford University, Stanford California, USA 3:10 PM Break 3:30 PM VIIA-5 Student Paper High Electron Mobility Germanium MOSFETs: Effect of n-type Channel Implants and Ozone Surface Passivation J. Hennessy and D.A. Antoniadis, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA 3:50 PM VIIA-6 Student Paper First Principal Simulation of CoSi2/Si and NiSi2/Si Contacts P. Zhao, Y. Ouyang, J. Chauhan, and J. Guo, Electrical and Computer Engineering, University of Florida, Gainesville, Floria, USA 4:10 PM VII.A-7 1.9 nm Wide Ultra-High Aspect-Ratio Bulk-Si FinFETs V. Jovanovic1,2, M. Poljak1, T. Suligoj1, Y. Civale2,3, L. K. Nanver2, 1Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia, 2ECTM-DIMES, Delft University of Technology, Delft, The Netherlands, and 3IMEC, Leuven, Belgium 4:30 PM VII.A-8 Experimental and theoretical explanation for the orientation dependence gate-induced drain leakage in scaled MOSFETs P. M. Solomon, S. E. Laux, L. Shi, J. Cai and W. Haensch, IBM, SRDC, T.J. Watson Research. Center, Yorktown Heights, New York, USA 4:50 PM VII.B-9 Reduction of self-heating effect in silicon MOSFETs on directly bonded Si-on-SiC wafer with high heat conductance M. Yoshimoto, H. Shinohara, and H. Kinoshita, Kyoto Institute of Technology, Sakyo, Kyoto, Japan Wednesday PM, June 24, 2009 Location: Main Level Dean’s Hall II Session VII.B Wide Bandgap Devices Session Organizer: TBA Session Chair(s): Tomas Palacios, Massachusetts Institute of Technology and S. Lawrence Selvaraj, Nagoya Institute of Technology 1:30 PM VII.B-1 Invited Paper Potential and Challenges of InN and Related Alloys for Advanced Electronic Devices Yasushi Nanishi1, Narihiko Maeda1,2, Tomohiro Yamaguchi1, and Masamitsu Kaneko1, 1Ritsumeikan University, Kusatsu, Shiga, Japan and 2NTT Photonics Laboratories, Atsugi, Kanagawa, Japan 2:10 PM VII.B-2 Student Paper SiC Bipolar Integrated Circuits on Semi-Insulating Substrate S. Singh and J. A. Cooper, School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana, USA 2:30 PM VII.B-3 High Voltage Lateral 4H-SiC JFETs on a Semi-insulating Substrate C.-F. Huang1, C.-L. Kan1, T.-L. Wu1, M.-C. Lee1, Y.-Z. Liu1, K.-Y. Lee2, and F. Zhao3, 1Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan, R.O.C., 2Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan, R.O.C., and 3Department of Electrical Engineering, University of South Carolina, Columbia, South Carolina, USA 2:50 PM VII.B-4 Double-Self-Aligned Short-Channel Power DMOSFETs in 4H-SiC S. R. Wang and J. A. Cooper, School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana, USA 3:10 PM Break 3:30 PM VII.B-5 Radiation Hardness Assessment of High Voltage 4H-SiC BJTs M. Nawaz1, C. Zaring1, S. Onoda3, T. Ohshima3 and M. Östling2, 1TranSiC AB, Kista, Sweden, 2Royal Institute of Technology (KTH), Kista, Sweden, and 3Japan Atomic Energy Agency, Takasaki, Gunma, Japan 3:50 PM VII.B-6 Student Paper Demonstration of SiC Heterojunction Bipolar Transistors with AlN/GaN Short-Period Superlattice Widegap Emitter H. Miyake1, T. Kimoto1,2, and J. Suda1, 1Department of Electronic Science and Engineering, Kyoto University and 2Photonics and Electronics Science and Engineering Center (PESEC), Kyoto University, Nishikyo, Kyoto, Japan 4:10 PM VII.B-7 Enhancing the breakdown voltage by growing 9 µm thick AlGaN/GaN HEMTs on 4 inch silicon S. L. Selvaraj, T. Suzue and T. Egawa, Research Center for Nano-Device and System, Nagoya Institute of Technology, Gokiso-cho, Showa-ku, Nagoya, Japan 4:30 PM VII.B-8 Student Paper Above 500 °C Operation of InAlN/GaN HEMTs D. Maier1, M. Alomari1, N. Grandjean2, J-F. Carlin2, M-A. Diforte-Poisson3, C. Dua3, A. Chuvilin4, David Troadec5, Christophe Gaquière5, U. Kaiser4, S. Delage3, and E. Kohn1, 1Institute of Electron Devices and Circuits, University of Ulm, Ulm, Germany, 2École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland, 3Alcatel-Thales III/V Lab, Marcoussis, France, 4Transmission Electron Microscopy Group, University of Ulm, Ulm, Germany, and and 5IEMN, Lille University of Science and Technology, Villeneuve d’Ascq, France Monday | Tuesday | Wednesday
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