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Technical Program—Advance Program

Monday | Tuesday | Wednesday

Monday AM, June 24, 2013
Location: McKenna Hall Auditorium
Plenary Session
Session Organizer: TBA
Session Chair: TBA
8:50 AM Welcoming Remarks
Presentations: IEEE Fellows and Best Student Paper Awards
9:20 AM I.-1 Plenary Paper
Beyond-Si CMOS Technologies Based on High-Mobility Channels
T. P. Ma, Department of Electrical Engineering, Yale University, New Haven, Connecticut, USA
10:00 AM Break
10:20 AM I.-2 Plenary Paper
Biomedical Micro And Nanotechnology: From Lab-On-Chip To Building With Cells
U. Hassan1,3, P. Bajaj2,3, E. Salm2,3, G. Damhorst2,3, and R. Bashir1,2,3, 1Department of Electrical and Computer Engineering, 2Department of Bioengineering, University of Illinois at Urbana-Champaign, Illinois, USA and 3Micro and Nanotechnology Laboratory, Urbana, Illinois, USA
11:00 AM I.-3 Plenary Paper
Along for the Ride: Reflections on the Past, Present, and Future of Semiconductor Electronics
M. Lundstrom, School of Electrical and Computer Engineering, Network for Computational Nanotechnology, Purdue University, West Lafayette, Indiana, USA
Monday PM, June 24, 2013
Location: DeBartolo Hall Room 141
Session II.A. III-V Devices
Session Organizer: TBA
Session Chair(s): TBA
1:30 PM II.A-1 Invited Paper
Semiconductor Nanowires for the Fabrication of Optoelectronic and Electronic Devices
F. J. Tegude, Solid State Electronics Department, CENIDE, University of Duisburg-Essen, Duisburg, GERMANY
2:10 PM II.A-2 Student Paper
GaSb nanowire pFETs for III-V CMOS
A. W. Dey1, J. Svensson1, B. M. Borg1, M. Ek2, E. Lind1, and L.-E. Wernersson1, 1Department of Electrical and Information Technology and 2Division of Polymer and Materials Chemistry, Lund University, Lund, SWEDEN
2:30 PM II.A-3  
Gate-first process and EOT-scaling of III-V nanowire-based vertical transistors on Si
K. Tomioka1, and T. Fukui1,2,1GS of Information Science and Technology and RCIQE, Hokkaido University, Sapporo, JAPAN and 2JST – PRESTO, Saitama, JAPAN
2:50 PM II.A-4 Student Paper
Impact of fin width scaling on carrier transport in III-V FinFETs
A. V. Thathachary, L. Liu and S.Datta, Department of Electrical Engineering, Pennsylvania State University, University Park, Pennsylvania, USA
3:10 PM Break
 
 
3:30 PM II.A-5
Performance enhancement of gate-all-around InGaAs nanowire MOSFETs by raised source and drain structure
M. Si1, X. Lou2, X. Li1, J.J. Gu1, H. Wu1, X. Wang2, J. Zhang1, R.G. Gordon2, and P. D. Ye1, 1School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, USA and 2Dept. of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts, USA
3:50 PM II.A-6 Student Paper
Compressively Strained InSb MOSFETs with High Hole Mobility for P-Channel Application
M. Barth1, A. Agrawal1, A. Ali1, J. Fastenau2, D. Loubychev2, W.K. Liu2 and S.Datta1, 1Department of Electrical Engineering, The Pennsylvania State University, University Park, Pennsylvania, USA and 2IQE, Inc., Bethlehem, Pennsylvania, USA
4:10 PM II.A-7 Student Paper
Performance Impact of Post-Regrowth Channel Etching on InGaAs MOSFETs Having MOCVD Source-Drain Regrowth
A. D. Carter1, S. Lee1, D.C. Elias1, C.-Y. Huang1, J. J. M. Law1, W. J. Mitchell1, B. J. Thibeault1, V. Chobpattana2, S. Stemmer2, A. C. Gossard1, and M. J. W. Rodwell1, 1ECE Department and 2Materials Department, University of California, Santa Barbara, California, USA
4:30 PM II.A-8 Student Paper
Effects of Oxidant Dosing on GaSb (100) prior to Atomic Layer Deposition and High- Performance Antimonide-based P-Channel MOSFETs with Ni-alloy S/D
Z. Yuan1, C.-Y. Chen1, A. Kumar1, A. Nainani2, B. R. Bennett3, J. B. Boos3, and K. C. Saraswat1, 1Department of Electrical Engineering, Stanford University, Stanford California, USA, 2Applied Materials Inc., Santa Clara California, USA, and 3Naval Research Laboratory, Washington DC, USA
4:50 PM II.A-9 Late News
Controlling Electronic Properties of Wafer-Bonded Interfaces among Dissimilar Materials: a Path to Developing Novel Wafer-Bonded Devices
S. Lal1, J. Lu1, M. Guidry1, B. Thibeault1, S. P. Denbaars2, and U. K. Mishra1, 1Department of Electrical and Computer Engineering and 2Materials Department, University of California, Santa Barbara, California, USA
5:10 PM II.A-10 Late News
Complete Band Alignment Determination of InAs-GaSb Broken-Gap Tunneling Field-effect Transistor Hetero-Junction
W. Li1,2, Q. Zhang1, O. A. Kirillov1, R. Bijesh3, Y. Liang2, D. Mohata3, B. Tian2, X. Liang2, S. Datta3, C. A. Richter1, D. J. Gundlach1, and N. V. Nguyen1, 1National Institute of Standards and Technology, Gaithersburg, Maryland, USA, 2Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing, CHINA, and 3Department of Electrical Engineering, The Pennsylvania State University, University Park, Pennsylvania, USA
Monday PM, June 24, 2013
Location: DeBartolo Hall Room 155
Session II.B. Graphene
Session Organizer: TBA
Session Chair(s):  
1:30 PM II.B-1 Invited Paper
2D Electronic Systems for Device Applications
J. Appenzeller, Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, USA
2:10 PM II.B-2 Student Paper
Realistic Simulation of Graphene Transistors Including Non-Ideal Electrostatics
A. Y. Serov, S. Islam and E. Pop, Dept. of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, Illinois, USA and Micro and Nanotechnology Lab, Urbana, Illinois, USA
2:30 PM II.B-3 Invited Paper
Magnetic Logic and Computation using Magnetic Tunnel Junctions
J.-P. Wang, Electrical and Computer Engineering Department, University of Minnesota, Minneapolis, Minnesota, USA
3:10 PM II.B-4 Student Paper
Substrate Dependent High-Field Transport of Graphene Transistors
S. Islam1, A. Y. Serov1, I. Meric2, K. L. Shepard2 and E. Pop1, 1Dept. of Electrical and Computer Eng., University of Illinois, Urbana-Champaign, Urbana Illinois, USA and 2Dept. of Electrical Eng., Columbia University, New York, New York, USA
3:10 PM Break
3:30 PM II.B-5
Border Trap Characterization in Metal-Oxide-Graphene Capacitors with HfO2 Dielectrics
M. A. Ebrish, D. A. Deen and S. J. Koester, University of Minnesota-Twin Cities, Minneapolis, Minnesota, USA
3:50 PM II.B-6 Student Paper
Graphene base hot electron transistors with high on/off current ratios
S. Vaziri1, G. Lupina2, A. D. Smith1, J. Dabrowski2, G. Lippert2, W. Mehr2, M. Östling1, and M. C. Lemme1,3, 1KTH Royal Institute of Technology, School of Information and Communication Technology, Kista, SWEDEN, 2IHP, Frankfurt (Oder), GERMANY, and 3University of Siegen, Siegen, GERMANY
4:10 PM II.B-7 Student Paper
Analysis and Benchmarking of Graphene Based RF Low Noise Amplifiers
H. Madan1, M. J. Hollander1, J. A. Robinson2, and S. Datta1, 1Electrical Engineering, The Pennsylvania State University, University Park, Pennsylvania, USA and 2Material Science and Engineering. The Pennsylvania State University, University Park, Pennsylvania, USA
4:30 PM II.B-8 Student Paper
State-of-the-art Flexible 2D Nanoelectronics Based on Graphene and MoS2
J. Lee1, H.-Y. Chang1, K. N. Parrish1, H. Li2, R. S. Ruoff2, and D. Akinwande1, 1Department of Electrical and Computer Engineering and 2Department of Mechanical Engineering Microelectronics Research Center, The University of Texas, Austin, Texas, USA
4:50 PM II.B-9 Late News
Can we engineer current saturation in narrow gap graphitic FETs without hurting mobility?
F. Tseng1, G. Fiori2, and A.W. Ghosh1, 1ECE, University of Virginia, Charlottesville, Virginia, USA and 2Universita di Pisa, Pisa, ITALY
5:10 PM II.B-10 Late News
Functionalized 3D 7x20-array of Vertically Stacked SiNW FET for Streptavidin Sensing
E. Buitragoa1, M. Fernández-Bolańos Badia1, Y. M. Georgiev2, R. Yu2, O. Lotty2, Justin D. Holmes2, A. M. Nightingale3 and A. M. Ionescu1, 1Nanolab, EPFL, Lausanne, SWITZERLAND, 2Materials Chemistry and Analysis Group, Department of Chemistry and Tyndall National Institute, University College Cork, Cork, IRELAND, and 3Imperial College London, South Kensington, London, UK
Monday PM, June 24, 2013
7:00 PM-9:00 PM
Location: McKenna Hall, Rooms 100-104 & 112-114
Session III. Poster Session
Session Organizers: TBA
III-1 Student Paper
Atomistic Tight-Binding based Evaluation of Impact of Gate Underlap on Source to Drain Tunneling in 5 nm Gate Length Si FinFETs
A. A. Goud, S. K. Gupta, S. H. Choday, and K. Roy, School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, USA
III-2
Low Specific ON-resistance and High Figure-of-Merit AlGaN/GaN HEMTs on Si substrate with Non-Gold Metal Stacks
M. J. Anand1, G. I. Ng1, S. Arulkumaran1, H. Wang1, Y. Li, S. Vicknesh1 and T. Egawa2, NOVITAS, Nanoelectronics Centre of Excellence, School of EEE, Nanyang Technological University, SINGAPORE and 2Research Centre for Nano-Device and System, Nagoya Institute of Technology, Showa-ku, Nagoya, JAPAN
III-3 Student Paper
Forming-free resistive switching with low current operation in graphene-insulator-graphene structures
B. Chakrabarti1,2, T. Roy2, C. A. Joiner2, Z. R. Hesabi2, and E. M. Vogel2, 1Department of Materials Science and Engineering, The University of Texas at Dallas, Richardson, Texas, USA and 2School of Materials Science and Engineering, Georgia Institute of Technology, Atlanta, Georgia, USA
III-4 Student Paper
Temperature Dependence of Current and Low-Frequency Noise in InAs Nanowire Transistors
C. J. Delker1, Y. Zi2, C. Yang2,3, and D. B. Janes1, 1School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana, USA, 2Department of Physics, Purdue University, West Lafayette, Indiana, USA, and 3Department of Chemistry, Purdue University, West Lafayette, Indiana, USA
III-5
A Physical Model to Predict STT-MRAM Performance Degradation Induced by TDDB
C.-H. Ho, G. D. Panagopoulos, S. Y. Kim, Y. Kim, D. Lee and K. Roy, Department of ECE, Purdue University, West Lafayette, Indiana, USA
III-6 Student Paper
Investigation of Backgate-Bias Dependence of Intrinsic Variability for UTB Hetero-Channel MOSFETs Considering Quantum Confinement
C.-H. Yu and P. Su, Department of Electronics Engineering & Institute of Electronics, National Chiao Tung University, TAIWAN
III-7 Student Paper
High Voltage Gain MESFET Amplifier Using Self-Aligned MOCVD Grown Planar GaAs Nanowires
C. Zhang, R. Dowdy, and X. Li, Department of Electrical and Computer Engineering, University of Illinois, Urbana, Illinois, USA
III-8 Student Paper
High-endurance solar-blind photodetectors using AlN on Si substrates for extreme harsh environment applications
D.-S. Tsai1, W.-C. Lien2, D.-H. Lien1, K.-M. Chen3, M.-L. Tsai1, D. G. Senesky4, Y.-C. Yu3, A. P. Pisano2, and J.-H. He1,5, 1Institute of Photonics and Optoelectronics, National Taiwan University, Taipei, TAIWAN, 2Applied Science and Technology Program & Department of Electrical Engineering and Computer Science, University of California, Berkeley, California, USA, 3Institute of Physics, Academia Sinica, Taipei, TAIWAN, 4Department of Aeronautics & Astronautics, Stanford University, Stanford, California, USA, and 5Department of Electrical Engineering, National Taiwan University, Taipei, TAIWAN
III-9
Optimization of Staggered Heterojunction p-TFETs for LSTP and LOP Applications
E. Baravelli, E. Gnani, R. Grassi, A. Gundi and G. Baccarani, ARCES, University of Bologna , ITALY
III-10 Student Paper
Computational study of the mobility in ultra-thin topological insulator films
G. Yin, D. Wickramaratne and R. K. Lake, Department of Electrical Engineering, University of California, Riverside, California, USA
III-11 Student Paper
AlGaN/GaN MISHEMTs on Silicon Using Atomic Layer Deposited ZrO2 as Gate Dielectrics
G. Ye1, H. Wang1,2 , S. Arulkumaran2, G. I. Ng1,2,R. Hofstetter1, Y. Li1, M. J. Anand1, K. S. Ang2, Y. K. T. Maung2 and S. C. Foo2, 1School of EEE, Nanyang Technological University, SINGAPORE and 2Temasek Laboratories, Nanyang Technological University, SINGAPORE
III-12 Student Paper
Mobility Strain Response and Low Temperature Characterization of Ge p-MOSFETs
I.-H. Wong1, Y.-T. Chen1, H.-J. Ciou2, Y.-S. Chen1, J.-Y. Yan1 and C. Liu1,2,3, 1Graduate Institute of Electronic Engineering, 2Graduate Institute of Photonics and Optoelectronics, National Taiwan University, TAIWAN, and 3National Nano Device Labs, Hsinchu, TAIWAN
III-13 Student Paper
Full-Band Quantum Transport Simulations of Monolayer MoS2 Transistors: Possibility of Negative Differential Resistance
J. Chang, L. F. Register and S. K. Banerjee, Microelectronics Research Center, The University of Texas, Austin, Texas, USA
III-14 Student Paper
Wide Bandgap HBT on Crystalline Silicon using Electron-Blocking PEDOT:PSS Emitter
J. Jhaveri2, S. Avasthi1, K. A. Nagamatsu2, and J. C. Sturm2, 1Princeton Institute for the Science and Technology of Materials and 2Department of Electrical Engineering, Princeton University, Princeton New Jersey, USA
III-15 Student Paper
Determination of Trap Energy Levels in AlGaN/GaN HEMT
J. Yang1, S. Cui1, T.P. Ma1, T.-H. Hung2, D. Nath2, S. Krishnamoorthy2, and S. Rajan2, 1Department of Electrical Engineering, Yale University, New Haven, Connecticut, USA and 2Department of Electrical and Computer Engineering, Ohio State University, Columbus, Ohio, USA
III-16 Student Paper
A 50 nm gate length InN tri-gate FET design with gm of 1.07 mS/µm and ft of 495 GHz
K. Ghosh, and U. Singisetti, Department of Electrical Engineering, University at Buffalo, State University of New York, Buffalo, New York, USA
III-17 Student Paper
Dissipative Transport in Nanoscale Monolayer MoS2 Transistors
L. Liu, Y. Lu, and J. Guo, Department of ECE, University of Florida, Gainesville, Florida, USA
III-18
A First Order Gradiometer Based Low Noise Magnetoelectric Sensor System
L. Mei1, S. Rupprecht2, Q. Yang2, and Q. M. Zhang1, 1Department of Electrical Engineering, The Pennsylvania State University, University Park, Pennsylvania, USA and 2Department of Radiology and Neurosurgery, The Pennsylvania State University College of Medicine, Hershey, Pennsylvania, USA
III-19 Student Paper
Side-Gate-Controlled Dual-Mode Power Gating Device by Graphene Nanoribbon Transistor
L.-T. Tung and E. C. Kan, School of Electrical and Computer Engineering, Cornell University, Ithaca, New York, USA
III-20 Student Paper
Single Photon Emission from Site-Controlled InGaN Quantum Dots up to 90 K
L. Zhang1, C.-H. Teng2, T. Hill1, B. Demory2, H. Deng1, and P.C. Ku2, 1Department of Physics, University of Michigan, Ann Arbor, Michigan, USA and 2Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan, USA
III-21
Silicon Nanowire Pirani Sensor Fabricated Using FIB Lithography
M. D. Henry, E. Shaner, and R. Jarecki, Sandia National Labs, MESA Fabrication Facility, Albuquerque, New Mexico, USA
III-22 Student Paper
Exploring SiSn as channel material for LSTP device applications
A. M. Hussain, H. M. Fahad, N. Singh, K. R. Rader, G. A. Torres Sevilla, U. Schwingenschlögl and M. M. Hussain Integrated Nanotechnology Lab, King Abdullah University of Science and Technology, Thuwal, SAUDI ARABIA
III-23 Student Paper
Low Loss High-k Slot Waveguides for Silicon Photonics
M. M. Naiini, C. Henkel, G. B. Malm and M. Östling, KTH Royal Institute of Technology, School of Information and Communication Technology, Integrated Devices and Circuits, Kista, SWEDEN
III-24 Student Paper
Plasmonic Terahertz Wave Detector Based on Silicon Field-Effect Transistors with Asymmetric Source and Drain Structures
M. W. Ryu1, K. Park1, W.-K. Park2, S.-Tae Han2 and K. R. Kim1, 1Ulsan National Institute of Science and Technology (UNIST), Ulsan, SOUTH KOREA and 2Korea Electrotechnology Research Institute, Ansan, Gyeonggi, SOUTH KOREA
III-25 Student Paper
Domain-Wall Shift Based Multi-Level MRAM for High-Speed, High-Density and Energy- Efficient Caches
M. Sharad, R. Venkatesan, A. Raghunathan and K. Roy, School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, USA
III-26 Student Paper
Chemical Doping for Threshold Control and Contact Resistance Reduction in Graphene and MoS2 Field Effect Transistors
N. Harati Pour1, Y. Anugrah1, S. Wu2, X. Xu2 and S. J. Koester1, 1ECE Department, University of Minnesota-Twin Cities, Minneapolis, Minnesota, USA and 2Department of Physics, University of Washington, Seattle, Washington, USA
III-27
Interband Tunneling Transport in 2-Dimensional Crystal Semiconductors
N. Ma and D. Jena, Department of Electrical Engineering, University of Notre Dame, Notre Dame, Indiana, USA
III-28 Student Paper
Extended-Gate Biosensors Achieve Fluid Stability with no loss in Charge Sensitivity
P. Dak, P. Nair, J. Go and M. A. Alam, School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana, USA
III-29 Student Paper
Novel switching mechanism with angle dependent transmission through graphene based pn junction
R. N. Sajjad and A. W. Ghosh, University of Virginia, Department of Electrical and Computer Engineering, Charlottesville, Virginia, USA
III-30
Optimization of the Electron Hole Bilayer Tunneling Field Effect Transistor
S. Agarwal1, J. T. Teherani2, J. L. Hoyt2, D. A. Antoniadis2, and E. Yablonovitch1, 1Electrical Engineering and Computer Sciences, University of California, Berkeley, California, USA and 2Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA
III-31
Bending Effect on frequency performance of InAlAs/InGaAs HEMT transferred on flexible substrate
S. Bollaert, J. Shi, N. Wichmann, and Y. Roelens, IEMN University of Lille, Villeneuve d'Ascq, FRANCE
III-32 Student Paper
I-NPN: A sub-60mV/decade, sub-0.6V selection diode for STTRAM
S. Deshmukh, S. Lashkare, B. Rajendran, U. Ganguly, Department of Electrical Engineering, Indian Institute of Technology, Bombay, Mumbai, INDIA
III-33 Student Paper
Exfoliated MoTe2 Field-Effect Transistor
S. Fathipour1, W. S. Hwang1,2, T. Kosel1, H. Xing1, W. Haensch2, D. Jena1, and A. Seabaugh1, 1Department of Electrical Engineering, University of Notre Dame, Notre Dame, Indiana, USA and 2IBM T. J. Watson Research Center, Yorktown Heights, New York, USA
III-34
Design Space Exploration of FinFETs in Sub-10nm Technologies for Energy-Efficient Near-Threshold Circuits
S. K. Gupta, W.–S. Cho, A. A. Goud, K. Yogendra and K. Roy, School of Electrical and Computer Engineering, Purdue University, West Lafayette Indiana, USA
III-35 Student Paper
Quantum Corrected Drift-Diffusion Simulation for Prediction of CMOS Scaling
S. Kim1, M. Salmani-Jelodar1, K. Ng2, and G. Klimeck1, 1Network for Computational Nanotechnology, Purdue University, West Lafayette, Indiana, USA and 2Semiconductor Research Corporation, Research Triangle Park, North Carolina, USA
III-36
Controlling Electronic Properties of Wafer-Bonded Interfaces among Dissimilar Materials: a Path to Developing Novel Wafer-Bonded Devices
S. Lal1, J. Lu1, M. Guidry1, B. Thibeault1, S. P. Denbaars2, and U. K. Mishra1, 1Department of Electrical and Computer Engineering and 2Materials Department, University of California, Santa Barbara, California, USA
III-37 Student Paper
Characterization of Low Frequency Noise in Nanowire FETs Considering Variability and Quantum Effects
S.-H. Lee1, Y.-R. Kim1, J.-H. Hong1, E.-Y. Jeong2, J.-W. Jang3, J.-S. Yoon3, D.-W. Kim4, C.-K. Baek3, J.-S. Lee1,2, and Y.-H. Jeong1,2,3, 1Department of Electrical Engineering, 2Division of IT-Convergence Engineering, 3Department of Creative IT Engineering, POSTECH, Pohang, Gyeongbuk, KOREA, and 4Samsung Electronics Co., Hwasung, KOREA
III-38 Student Paper
Scaling Effect on Specific Contact Resistivity in Nano-scale Metal-Semiconductor Contacts
S.-H. Park2, N. Kharche3, D. Basu2, Z. Jiang1, S. K. Nayak4, C. E. Weber2, and G. Klimeck1, 1Purdue University, West Lafayette, Indiana, USA, 2Process Technology and Device Modeling Group, Intel Corporation, Hillsboro, Oregon, USA, 3Brookhaven National Laboratory, Upton, New York, USA, and 4Rensselaer Polytechnic Institute, Troy, New York, USA
III-39 Student Paper
Quantification of Interface Trap Density above Threshold Voltage by Gated Hall Method in InGaAs Buried Quantum Well MOSFET
T. Chidambaram1, S. Madisetti1, A. Greene1, M. Yakimov1, V. Tokranov1, D. Veksler2, R. Hill2, and S. Oktyabrsky1, 1College of Nanoscale Science and Engineering, University at Albany-SUNY, Albany, New York, USA and 2SEMATECH, Albany, New York, USA
III-40 Student Paper
Plasmonic Terahertz Monochromatic Coherent Emission from an Asymmetric Chirped Dual-Grating-Gate InP-HEMT with a Photonic Vertical Cavity
T. Watanabe1, Y. Kurita1, A. Satou1, T. Suemitsu1, W. Knap2, V. V. Popov3, and T. Otsuji1, 1Research Institute of Electrical Communication, Tohoku University, Sendai, JAPAN, 2LC2 Laboratory, Université Montpellier 2 & CNRS, Montpellier, FRANCE, and 3Kotelnikov Institute of Radio Engineering and Electronics RAS, Saratov, RUSSIA
III-41 Student Paper
Junctionless InGaAs MOSFETs with InAlAs Barrier Isolation and Channel Thinning by Digital Wet Etching
V. Djara, K. Cherkaoui, T. Lopez, É. O’Connor, I. M. Povey, K. K. Thomas, P. K. Hurley, Tyndall National Institute, University College Cork, Cork, IRELAND
III-42 Student Paper
Spin Logic via Controlled Correlation in a Topological Insulator-Nanomagnet Hybrid Structure
X. Duan, Y. G. Semenov, and K. W. Kim, Department of Electrical and Computer Engineering, North Carolina State University, Raleigh, North Carolina, USA
III-43 Student Paper
Comprehensive Trap-Level Study in SiOx-based Resistive Switching Memory
Y.-F. Chang1, Y.-C. Chen3, J. Li1, F. Xue1, Y. Wang1, F. Zhou1, B. Fowler2 and J. C. Lee1, 1Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas, USA, 2PrivaTran, LLC, Austin Texas, USA and 3Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu, TAIWAN
III-44 Student Paper
On Characteristic Variability of 16-nm-Gate Bulk FinFET Devices Induced by Intrinsic Parameter Fluctuation and Process Variation Effect
C.-Y. Chen, Y. Li, Y.- Y. Chen, H.-T. Chang, S.-C. Hsu, W.-T. Huang, C.-M. Yang, and L.-W. Chen, Parallel and Scientific Computing Laboratory, Department of Electrical and Computer Engineering, National Chiao Tung University, Hsinchu, TAIWAN
III-45 Student Paper
Toward Single Molecule Detection in Physiological Buffer Using Planar FET Biosensors
Y. Wang1, P. Casal2, S. C. Lee2, and W. Lu1,3, 1Department of Electrical and Computer Engineering, 2Department of Biomedical Engineering, The Ohio State University, Columbus,Ohio, USA and 3Department of Nanobio Materials and Electronics, Gwangju Institute of Science and Technology, , KOREA
III-46 Student Paper
High Threshold Voltage in GaN MOS-HEMTs Modulated by Fluorine Plasma and Gate Oxide
Y. Zhang, M. Sun, S. J. Joglekar, and T. Palacios, Microsystems Technology Laboratories, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA
III-47 Student Paper
Small Signal Characteristics of Ionic Liquid Gated Mott Transistors
Y. Zhou and S. Ramanathan, Harvard University, School of Engineering and Applied Sciences, Cambridge, Massachusetts, USA
III-48 Student Paper
Atomistic Simulation on Gate-recessed InAs/GaSb TFETs and Performance Benchmark
Z. Jiang1, Y. He1, G. Zhou2, T. Kubis1, H. G. Xing2, and G. Klimeck1, 1Network for Computational Nanotechnology, Purdue University, West Lafayette, Indiana, USA and 2University of Notre Dame, Notre Dame, Indiana, USA

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